It is desirable to shrink the feature size of semiconductor devices to improve device performance and to pack more devices on wafers utilized to produce the devices. As the feature size of semiconductor devices gets smaller, for example, below 0.18 micron technology, it is more difficult to pattern the metal layers of the device. The primary reason for this difficulty is that the depth of focus for patterning the metal layer is less because of the reduced feature size. One way to address this depth of focus limitation is to provide a thinner photoresist layer thereon. However, when the photoresist layer is reduced, the etching of the feature becomes more difficult due to the high erosion rate of the photoresist.
One way to address this erosion problem with thinner photoresist is to provide a hard mask layer on top of the metal layer. However, hard mask layers that are conventionally utilized are made from materials that have high dielectric constants. In addition, the hard mask layers are typically highly reflective. Accordingly, the hard mask layers will have to be removed due to the resultant high capacitance due to their high dielectric constant and because they are highly reflective which can interfere with the manufacturing process. Finally, another problem associated with typical hard mask layers is that they must be applied utilizing a high temperature (&gt;400.degree. C.) and in so doing the properties of the underlying layers can be significantly affected.
The removal of the high dielectric hard mask layer requires an additional step that makes the overall process prohibitively expensive. As has aforementioned, the metal layers, as well as the high capacitance hard mask layers, are highly reflective. This further affects the performance of the integrated circuit as the feature size becomes smaller, i.e., smaller wavelengths. The anti-reflective properties of the features becomes more important for increased performance and the like.
What is needed is a system and method which will over come the above-identified problems. This system should be easy to implement and should not significantly add to the processing steps in an existing system. The system and method in accordance with the present invention should be one which is cost effective and should be effectively implemented in existing process technology. The present invention addresses such a need.